Major IC packaging and testing houses have stepped up investment in advanced packaging technologies such as wafer-level packaging and flip-chip (FC). Meanwhile, building new production lines for copper wire bonding processes is another investment focus as rising gold prices has discouraged more clients from adopting conventional processes based on gold wire.
Despite uncertainties in the semiconductor industry outlook, packaging and testing firm STATS ChipPAC will continue investing in advanced IC packages for space-critical designs that...
IC packaging and testing firm Advanced Semiconductor Engineering (ASE) on October 23 opened a new plant, named K12, in Kaohsiung, southern Taiwan. During a ceremony marking the opening...
Taiwan Semiconductor Manufacturing Company (TSMC) has undertaken in-house high-end packaging of ICs produced by its foundry processes for fabless IC design houses in the US and Europe...
Advanced packaging is currently growing at a 18% compound annual rate, and equipment manufacturers will be major beneficiaries, according to market research firm The Information Ne...
Advanced Semiconductor Engineering (ASE) and Siliconware Precision Industries (SPIL) have said they currently have no plans to adjust planned capex for 2011. Meanwhile, both IC packagers...
Packaging and testing firm Powertech Technology (PTI) expects the development of new technologies including wafer-level packaging, 3D IC packaging and copper pillar bumping to bear...
Major IC packagers Advanced Semiconductor Engineering (ASE) and Siliconware Precision Industries (SPIL), and memory packaging and testing specialist Powertech Technology (PTI), have...
Siliconware Precision Industries (SPIL) is stepping up the development of system-in-package (SiP) specifically for use in handsets, and has been more actively expanding its IDM client...
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