Macronix, the world-leading non-volatile memory (NVM) solution manufacturer, today unveiled its new-generation 12 pin-count bus interface called OctaBus. This breakthrough design delivers the high speed, high efficiency features of Macronix OctaFlash products, while incorporating OctaRAM into the same data I/O bus, reducing the pin count to 12, thus enabling simplicity in system design while optimizing PCB space, resulting in significant cost savings and at the same time dramatically improving performance.
Macronix introduced OctaFlash, the world's fastest, high-efficiency 8 I/O Serial NOR Flash with 400MB/s data transfer rate in 2015. The booming development of IoT, the Automotive Electronics markets, the increasing demand for "instant-on" and an "interactive graphical user interface, has driven Macronix to introduce the new low pin-count, high-performance OctaBus memory interface. The new bus interface keeps the low pin count feature of OctaFlash and combines both OctaFlash and the new OctaRAM components on a single bus. The two products can share the same data I/O and some signal control pins and are designed to be compatible with each other with regards to their modified memory protocols. This enables chipset providers to combine PCB layout designs for OctaFlash and OctaRAM or even use a common PCB design.
In the new OctaBus memory subsystem, OctaFlash is recognized as an industry leader based on its 200MHz high performance frequency; in tandem OctaRAM will enable designers to optomise their system design, giving significant cost savings through efficient pin sharing. With its design changed from parallel to serial interface, OctaRAM delivers a performance comparable to DDR2 and in addition allows an improved ease of system design, thus the embedded systems adopting OctaRAM will have a cutting edge advantage. Macronix's new interface is expected to lead the industry evolution to high speed and highly efficient system design in the same way as when Macronix was the leader who pioneered the NOR Flash transition from parallel to serial interfaces.
OctaBus memory holds more advantages in MCP chip market
With its strengths in low pin count and sharing of the I/O bus, OctaBus memory is expected to achieve great success also in the MCP (multi chip package) market that MCU and core chip vendors are closely watching. The original design of MCP chips, using separate buses, typically requires a BGA package with 80 pins. A design adopting OctaBus can have the package dimension reduced from 9x9mm to 6x8mm. In particular, an MCP combining OctaBus advantages of OctaFlash and OctaRAM in KGD form (known good die), provides even further simplicity of design and reduced complexity to satisfy system manufacturers' critical demands of cost reduction and design flexibility. Macronix strongly believes that this interface offers such a significant system improvement to designers that the company is promoting OctaBus memory as an open standard.
Macronix's OctaBus memory subsystem will include three major product lines: Macronix's own OctaFlash series, an OctaMCP product line and a discrete OctaRAM line provided by other memory ecosystem and supply chain partners.
•OctaFlash: 64Mb to 2Gb
Package: 24BGA (all), 16SOP (256Mb-512Mb)
Availability: 512Mb in production; rest sampling
• OctaRAM: 32Mb-128Mb 3V/133MHz, 1.8V/200MHz
Package: 24BGA
Availability: 64Mb sampling
• OctaMCP: 512Mb (OctaFlash) + 64Mb( OctaRAM), 3V
Package: 24BGA
Availability: ES (Engineering Samples) by Jan/2017
Macronix OctaBus Memory Solutions
Elain Shih, product marketing manager, MXIC
DIGITIMES' editorial team was not involved in the creation or production of this content. Companies looking to contribute commercial news or press releases are welcome to contact us.
