Wafer foundry houses in China have stepped up efforts to develop Fully Depleted Silicon-on-Insulator (FD-SOI), or also called Ultra-Thin Body (UTB), processes for wafer production, compared to the Fin Field-Effect Transistor (FinFET) processes being adopted by Taiwan Semiconductor Manufacturing Company (TSMC) and Intel, according to Digitimes Research.
FD-SOI is characterized by lower forward voltage and operating voltage requirements and also more power saving. Meanwhile, the operating cost of FD-SOI per circuit is lower than that of FinFET.
However, the FD-SOI process has not been scaling down as well as FinFET, and the transistor density of FD-SOI is also lower than that of FinFET, Digitimes Research noted.
Current advocates for the FD-SOI process include Globalfoundries, Samsung Semiconductor and STMicroelectronics. China-based HH Grace Semiconductor is also expected to join the FD-SOI camp.
However, combined revenues of the FD-SOI camp are currently lower than those recorded by TSMC, a reflection of the foundry capacity of the different processes. This disparity in turn can affect chipset suppliers' choice of foundry services.
At present, only chipmakers which have small foundry orders for low- and medium-priced chips that cannot receive priority foundry services at FinFET-based foundry houses, will likely seek FD-SOI production, commented Digitimes Research, adding that chip suppliers rolling out high-priced, high performance, high density chips at volume will incline to produce their devices at FinFET fabs.
