United Microelectronics (UMC) has launched a wafer-to-wafer (W2W) 3D IC project with partners including Advanced Semiconductor Engineering, Cadence, Faraday Technology, and Winbond Electronics to assist clients in accelerating the manufacture of their 3D products, according to the Taiwan-based pure-play foundry.
The project offers a complete solution for integrating memory and processors using silicon stacking technology, addressing the growing demand for efficient computing at the device level as artificial intelligence moves from the cloud to the edge, UMC indicated.
The W2W 3D IC project, which involves partner collaboration, is focused on edge AI applications requiring mid-to-high computing power, extensive and customized memory modules, and relatively low power consumption, such as home and industrial IoT, security, and smart infrastructure. The platform is expected to be ready in 2024, following the completion of system-level verification, ensuring a smooth process for customers, according to UMC. It will deal with a variety of heterogeneous integration issues, such as wafer stacking rule alignment between logic and memory fabs, an efficient design flow for vertical wafer integration, and a tried-and-true package and testing technique.
"Through this cross-supply-chain vertically integrated project, we are excited to work with industry leaders to enable customers to leverage our advanced hybrid bonding W2W technology, to enjoy the inherent performance gain, form factor reduction, and cost benefits of 3D IC," said G.C. Hung, VP of UMC's result delivery office and research development. "Heterogeneous integration will continue to push the boundaries of semiconductor innovation in the More-than-Moore era, and UMC looks forward to contributing our robust CMOS wafer manufacturing capabilities together with advanced packaging solution to the development of a complete ecosystem."
According to UMC, each collaborator contributes its own unique expertise to this project. The wafer-to-wafer hybrid bonding technology and CMOS wafer production offered by UMC, as well as the customized ultra-bandwidth elements (CUBE) architecture developed by Winbond, facilitate the deployment of potent edge AI devices across multiple platforms and interfaces. Faraday offers comprehensive integrated solutions for the development of 3D advanced packaging, in addition to memory IP and ASIC chiplet design. Cadence offers sign-off certification, wafer-to-wafer design flow, and extraction via through-silicon vias (TSV), whereas ASE performs die cutting, packaging, and testing.
