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TSMC’s 3nm bet in Japan signals a deeper Taiwan-Japan tech pact

Bryan Chuang, Taipei; Charlene Chen, DIGITIMES Asia Friday 6 February 2026 0

Credit: Executive Yuan

To meet the surging demand driven by AI, TSMC is upgrading its second wafer fab under construction in Kumamoto, Japan, to use more advanced 3nm process technology. This development was personally conveyed by TSMC chairman C.C. Wei to Japanese Prime...

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