End-to-end autonomous driving has become the mainstream technology path, and the inference demand created by Physical AI in autonomous driving systems is, in turn, reshaping automotive system-on-chip (SoC) design. DIGITIMES presents a 3x3 matrix of key automotive SoC indicators for the AI era, organized around underlying hardware specifications, mid-layer efficiency performance, and upper-layer solution compatibility, as an evaluation framework for next-generation automotive SoC solutions. DIGITIMES believes that the AI accelerator will become the compute core of next-generation automotive SoCs, meeting the low-latency, low-system-power, and low-memory-bottleneck requirements of AI inference in autonomous driving systems.
As global industry consensus gradually forms around the three stages of AI evolution, attention is also shifting to the underlying engineering, core tasks, and key metrics for each stage, with hardware requirements differing accordingly. In the Agentic AI stage, AI systems must handle not only inference but also auxiliary tasks such as task scheduling and tool calling, so they rely on the compute strengths of the central processing unit (CPU), which is supporting demand for CPUs. Looking ahead to Physical AI, AI systems will need to perform real-time, accurate inference in diverse and changing physical environments. DIGITIMES believes the neural processing unit (NPU) will become the main compute core for Physical AI development.
This report covers how physical AI evolution is impacting automotive SoC design and the specifications offered by major vendors such as Nvidia, Qualcomm, and Mobileye.
Chart 1: Overview of computer core processor categories and the three stages of AI evolution
Chart 2: Role division among CPU, GPU, and NPU across AI development stages
Chart 3: NPU compute core equations and chip design reference architecture
Chart 4: End-to-end autonomous driving architecture design and technology evolution
Chart 5: FSD chip architecture and 2.0 upgrade specifications
Chart 6: FSD NPU chip design architecture and FSD energy efficiency
Evaluation metrics and solution design for AI-generation automotive SoC
Chart 7: Key metrics grid and major vendors for AI-generation automotive SoC
Chart 8: Nvidia Drive Thor design reference architecture and specifications
Chart 9: Qualcomm Snapdragon Ride Elite design reference architecture and specifications
Chart 10: Mobileye EyeQ 7H design reference architecture and specifications
Chart 11: Heterogeneous computing SoC design reference and compute unit task allocation
Chart 12: Overview of how autonomous driving technology transitions impact automotive SoC design

