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Friday 4 September 2026
Ennostar accelerates AI optical communications with micro LED
Ennostar is pushing into AI high-speed optical communications and says Taiwan's full supply-chain ecosystem could bring micro LED into commercial use sooner than expected. Andrew Tsai,...
Thursday 3 September 2026
SanDisk pushes HBF ecosystem as AI inference reshapes token economics
The rapid rise of AI inference, multimodal inputs, and AI agents is giving NAND flash a new strategic role.
Thursday 3 September 2026
Apple, Xiaomi and Nvidia chase terabyte-class bandwidth for AI chips
For decades, semiconductor performance gains largely came from shrinking process nodes, from 22nm and 14nm to 7nm and 3nm. AI is changing the constraint: processors are getting faster,...
Wednesday 2 September 2026
Sandisk says HBF can match HBM bandwidth with up to 16x the capacity
Sandisk says its NAND-based High Bandwidth Flash (HBF) technology can match HBM bandwidth while providing eight to 16 times the capacity at a similar cost, positioning flash memory...
Wednesday 2 September 2026
Micron says tightly coupled DRAM could deliver more than 10x HBM bandwidth
Micron Technology is exploring tightly coupled DRAM that could deliver more than 10 times the bandwidth of HBM while using substantially less energy per bit, as the memory maker looks...
Wednesday 2 September 2026
DRAM giants target 3D stacking to break memory wall and power bottlenecks
At a shared stage at Semicon Taiwan 2026, executives from Samsung Electronics, SK Hynix, and Micron agreed that traditional 2.5D high-bandwidth memory (HBM) using interposers is approaching...
Wednesday 2 September 2026
UMC targets 12-inch TFLN to break 400G SiPh bottleneck
As interconnect traffic in AI hyperscale data centers climbs, optical modules are moving toward the 1.6T and 3.2T generations. United Microelectronics Corporation (UMC), Taiwan's second-largest...
Wednesday 2 September 2026
Apple's M6 and M5 Ultra break rule tying process to chip strength
Apple has unveiled new Mac mini and Mac Studio models, equipped respectively with its first 2-nanometer chip, the M6, and the four-die M5 Ultra. Most notably, the latest 2-nanometer...
Wednesday 2 September 2026
8 September Hsinchu seminar: Silicon photonics driving AI chains

As AI infrastructure drives demand for higher bandwidth, lower power consumption and faster connectivity, silicon photonics is becoming increasingly important to the...

Wednesday 2 September 2026
Nvidia pushes into HBM base dies as NVHBM battle heats up
The competition in high-bandwidth memory (HBM) is moving beyond DRAM stack height, bandwidth, and packaging to the base die at the very bottom of the package. As Nvidia pushes its...
Tuesday 1 September 2026
Samsung eyes early 2027 LPDDR5X-PIM production, touts 3.8x performance gain
Samsung Electronics is targeting mass production of its LPDDR5X processing-in-memory (PIM) solution in late 2026 or early 2027, moving the technology closer to commercialization as...
Tuesday 1 September 2026
Research insights: AI Fabric optical interconnects move into racks as 400G/lane and CPO maturity emerge as key variables
DIGITIMES observed that as AI systems continued to scale, interconnect requirements inside AI data centers had expanded from chips, packages, and boards to racks, clusters, and eventually...
Tuesday 1 September 2026
Cisco: CPO is ready for mass deployment amid surging AI data-center demand
For global cloud operators and network vendors, Cisco said co-packaged optics (CPO) is moving from lab promise to commercial necessity as AI data centers strain power budgets and bandwidth...
Tuesday 1 September 2026
Samsung is said to develop 8-layer HBM4E for Nvidia's NVHBM push
Samsung Electronics is reportedly developing an 8-layer version of seventh-generation high-bandwidth memory for Nvidia, matching the chipmaker's requirements for its customized NVHBM...
Monday 31 August 2026
TSMC tackles the AI I/O wall with two COUPE bandwidth paths and deeper heterogeneous integration
TSMC is sharpening its silicon photonics (SiPh) roadmap to address the widening gap between AI compute growth and chip-to-chip data movement, unveiling two bandwidth-scaling paths...