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    Google and Meta help drive AI glasses shipments to 17.5 million units in 2026
    6h 59min ago
    SK may pause SK Siltron sale as AI strategy gains priority over financial restructuring
    6h 59min ago
    AI cooling demand keeps booming, lifting suppliers’ outlook through 2029
    6h 59min ago
    Nvidia, Infineon and GIGABYTE back supply chain cooperation to ease AI power bottlenecks
    7h 17min ago
    Micron, Samsung and SK Hynix join Anthropic in a supply chain shift
    7h 18min ago
    Pegatron expands physical AI push with Nvidia partnership and second-gen robot dog
    7h 18min ago
    NEWS TAGGED TRANSISTOR
    Thursday 28 May 2026
    Huawei chip chief says post-Moore race is no longer just about nanometers
    As Moore's Law nears its limits, Huawei is promoting its "Tau (τ) Law" as a post-Moore chip framework that shifts the focus from nanometer process nodes to shorter signal transmission...
    Tuesday 26 May 2026
    Huawei Tau Law series 1: How China's chip industry is pivoting beyond Moore's Law
    When Huawei unveiled its "Tau (τ) Scaling Law" at ISCAS 2026 in Shanghai, the announcement signalled more than another chip architecture update. It marked China's most ambitious...
    Tuesday 26 May 2026
    Analysis: Huawei's Tau Law signals a new semiconductor framework — with implications beyond China
    As the global semiconductor industry approaches the physical limits of transistor scaling, Huawei has proposed a new framework for the post-Moore era through its recently introduced...
    Monday 25 May 2026
    Huawei reveals post-Moore semiconductor roadmap targeting 1.4nm-equivalent chip performance
    As the global semiconductor industry confronts the limits of Moore's Law, Huawei has unveiled a new roadmap aimed at extending chip performance growth through architecture, interconnect,...
    Friday 10 April 2026
    Column: Corintis uses algorithms to target chip hotspots for precise cooling
    As HPC and AI processors push computing performance to unprecedented levels, transistor density has reached a point where thermal behavior is no longer uniform. Instead of gradual,...
    Monday 30 March 2026
    SEMICON China 2026: JCET CEO makes the case for atomic-level packaging to carry Moore's Law forward
    Advanced wafer manufacturing is approaching physical limits near the 1nm node, according to Zheng Li, director and CEO of JCET Group.
    Monday 30 March 2026
    DRAM scaling hits limits as next-generation memory faces delays

    The global DRAM industry is approaching a structural inflection point, as traditional scaling methods struggle to deliver the performance...

    Thursday 12 March 2026
    IBM, Lam Research join forces on sub-1nm logic and High-NA EUV development

    IBM and Lam Research have announced a five-year collaboration to develop materials, manufacturing processes, and High-NA EUV lithography...

    Wednesday 18 February 2026
    Analysis: 2nm shifts chipmaking from scaling to chiplet integration

    The semiconductor industry is shifting at 2nm from transistor scaling to chiplet-based architectures and advanced packaging. Performance...

    Sunday 8 February 2026
    GlobalFoundries reinvent wafer services by integrating IP to meet evolving market demands
    The traditional wafer foundry model is transforming as leading foundries increasingly incorporate intellectual property (IP) into mature technology nodes to address economic pressures...
    Tuesday 30 December 2025
    TSMC hits its 2nm milestone on schedule as China flexes military muscle
    TSMC today announced that its highly anticipated 2nm (N2) technology began volume production in the fourth quarter of 2025, meeting its roadmap targets precisely on schedule.
    Tuesday 30 December 2025
    South Korea charts road to 0.2nm chips by 2040
    The global semiconductor industry is poised to enter the "angstrom era" by 2040 as circuit dimensions shrink to one-tenth of current levels, according to a long-term technology roadmap...
    Saturday 20 December 2025
    Samsung reveals sub-10nm DRAM breakthrough targeting 0a, 0b nodes
    Samsung Electronics has unveiled a key technology pathway for sub-10nm DRAM, offering a rare public look at how the company plans to push memory scaling beyond current 10nm-class limits...
    Thursday 18 December 2025
    Intel completes high-NA EUV validation for 14A, advances 2D transistor tech
    Intel has completed acceptance testing of the industry's first commercial high-NA EUV lithography system with a numerical aperture of 0.55, the ASML Twinscan EXE:5200B, laying the...
    Friday 7 November 2025
    Advanced packaging emerges as AI's next performance frontier, insights from DIGITIMES analyst Tony Huang
    As Moore's Law slows, advanced packaging has become the critical lever driving breakthroughs in AI chip performance, according to DIGITIMES chief semiconductor analyst Tony Huang....
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    BIZ FOCUS
    Jun 1, 08:00
    LITEON Showcases AI at COMPUTEX Panel Featuring NVIDIA, Infineon, GIGABYTE
    Friday 29 May 2026
    Datotek Introduces AI PSSD Sustainable Storage Solutions at COMPUTEX 2026
    Thursday 28 May 2026
    Retronix Launches Sparrow Hawk Edge AI Computing Platform Worldwide
    Thursday 28 May 2026
    AGI Debuts DDR5 R-DIMM and Smart Industrial Solutions at COMPUTEX 2026
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    RESEARCH INSIGHTS
    Weekly research roundup: Qualcomm's AI strategy, memory giants and updated 2026 smartphone outlook