Astrus, a Canada-based startup focusing on analog IC design automation, is aspiring to revolutionize the global chip design industry by leveraging recent breakthroughs in artificial intelligence (AI). Based in Toronto, the company was just founded in January 2023, but has already caught the attention of some semiconductor heavyweights.
In its pre-seed funding round, Astrus raised US$275,000 to support its technical proof of concept (PoC), backed by three investors, including Khosla Venture. Talking to DIGITIMES Asia, Brad Moon, Astrus co-founder and CEO, indicated that Intel Capital - Intel's VC arm - is already knocking on the door.
A graduate of University of Alberta where he specialized in analog IC design, Moon was at first working on designing satellite CMOS image sensors at the company Teledyne DALSA, before moving on to co-found two startups that both touched on the intersection of hardware and software development. Together with Wang Zeyi, who once researched under Martin Muller, whose laid the foundation of DeepMind's AlphaGo, Moon founded Astrus after recognizing AI's potential to overcome a chronic challenge in integrated circuit design.
Astrus seeks to streamline the microchip design process by automating analog layout using state-of-the-art AI. Automation of the process will allow rapid generation of layouts, eliminating the long wait times for circuit designers, substantially boosting their productivity, and enabling them to iterate on designs more efficiently.
"There's a huge discrepancy between state-of-the-art software development tools and hardware development tools," observed Moon. "The gap gets even bigger in the semiconductor industry, such as semiconductor design tools." Moon attributed the gap to the comparably fewer people working on improving hardware development tools.
In the design process of digital ICs, designers write code in the form of hardware description language that models and describes the logic of the circuit. A synthesizer then does the transistor placement and wire routing based on the written code. "Placement and routing are what we're really looking at", said Moon. "The process is largely automated on the digital side."
In comparison, when designing analog ICs, the placement and routing process is completely manual - it takes six to twenty hours for a layout engineer to work on the placement and routing of a common analog chip like an operational amplifier before giving it back to the circuit designers for simulation. Factoring in issues such as parasitics, the simulation process could go through five to six iterations, and in total it might take two to four weeks of back-and-forth before the design is completed, Moon indicated. The layout challenge only intensifies as transistor size decreases, as layout sensitivity increases, and manufacturing rules become further complicated.
Nobody has been able to solve the analog layout problem. However, according to Moon, AI has brought forth a turning point for the industry that makes it possible to tackle the issue. Through Astrus AI, the deep reinforcement learning (DPL) engine developed by Astrus, chip designers can iterate five times a day instead of iterating five times a week. The Astrus co-founder estimates US$2 billion in annual revenue based on the calculation that there are 60,000 IC designers in the world that would use the tool with a bottom tier pricing of US$40,000 per person per year.
Though the product has not yet hit the market, Moon said that Astrus has been demonstrating the prototype to potential customers with positive feedback. The company is looking to get the first version of Astrus AI commercialized in about four to eight months, after wrapping up its technical PoC. One challenge, according to Moon, is rebuilding the layout environment from scratch to make a high-performance AI-friendly environment, which has taken most of Astrus' development time.
When it comes to automating analog chip design, Astrus is not without competitors, but Moon is confident that Astrus has a leading edge, especially after factoring in parasitic resistances and capacitances. There have been many startups attempting to automate analog layouts, but to no avail. Without state-of-the-art AI, the scene is "essentially a large graveyard," according to Moon. Meanwhile, there have been companies which, instead of trying to automate analog chip layout, opt to boost the productivity of layout engineers. Though such endeavors have been successful, their offerings are still short of what Astrus has been working on.
What's next? While Astrus' current offerings are optimized for certain types of analog chips and certain technology nodes, the company is planning to build an AI engine that is generalized for all circuits and all technology nodes once it has product-market fit with one technology node. Astrus is also planning a product class with specialized features for the high-speed market.
After its first product hits the market, Astrus expects a seed funding round in the range of US$5 million, seeking to get investors on board who are willing to follow through on future rounds. In the meantime, Astrus is in discussions with Intel to set up a pilot within the company. As more and more companies like Google and Amazon seek to develop in-house IC design capabilities, Astrus is already seeing its horizon widening.
Brad Moon, Astrus co-founder and CEO.
A special thanks to the Canadian Trade Office in Taipei for coordinating the interview
