The technological benefits that the 3D stacking of integrated circuits brings have the potential to ease the current chip shortage concerns, according to Cadence Design Systems. As...
Going beyond Moore's Law has become an important force driving advanced semiconductor technology. Top companies such as TSMC, Samsung Electronics and Intel are all already seeing...
China is stepping up the development of homegrown EDA (electronic design automation) software and systems as part of its efforts to boost self-sufficiency in semiconductor, and many...
Cadence Design Systems and United Microelectronics (UMC) have jointly announced that the Cadence millimeter wave (mmWave) reference flow has achieved certification for UMC's 28HPC+...
With TSMC - the world's top pure-play foundry - anticipating record-high capex levels this year, semiconductor equipment vendors particularly those engaged in TSMC's supply chain...
Cadence Design Systems has announced that Global Unichip Corporation (GUC) successfully deployed its digital implementation and signoff flow and delivered advanced-node (N16, N12...
Cadence Design Systems and National Instruments (NI) have announced they have entered into a definitive agreement for the former to acquire AWR Corporation, a wholly-owned subsidiary...
Cadence Design Systems and United Microelectronics Corporation (UMC) have jointly announced that the US-based EDA firm's analog/mixed-signal (AMS) IC design flow has achieved certification...
Cadence Design Systems has announced that its digital full flow has achieved certification for the Samsung Foundry 5nm low-power early (5LPE) process with extreme ultraviolet (EUV)...
Samsung Electronics provided an update to its advanced-node process technology roadmap, including its 3nm gate-all-around (GAA) technology, during a recent company event in Santa...
TSMC has announced the expansion of its open innovation platform (OIP) cloud alliance, with Mentor Graphics joining inaugural members Amazon Web Services (AWS), Cadence, Microsoft...
TSMC has announced delivery of the complete version of its 5nm design infrastructure within the Open Innovation Platform (OIP). This full release enables 5nm systems-on-chip (SoC)...
The US-China trade war, a key threat to the global economy in 2018, will continue to play a pivotal role in 2019. But what does it mean to the world's biggest manufacturer and market,...
Cadence has disclosed a test chip containing next-generation DDR5 memory interface IP, which operates with Micron Technology's prototype DRAM chips. The test chip was fabricated in...
