Cadence Design Systems has announced that its complete suite of digital and signoff tools has achieved certification for Samsung Foundry's process design kit (PDK) and foundation...
Cadence Design Systems has announced that its digital, signoff and custom/analog tools have achieved V1.0 Design Rule Manual (DRM) and SPICE certification from TSMC for its 10nm FinFET...
Cadence Design Systems has announced the availability of foundry-proven IC packaging design and analysis solutions for advanced fan-out wafer-level chip scale packaging (WLCSP) and...
Cadence Design Systems has announced the delivery of the new Virtuoso advanced-node platform that is enabled for all 10nm FinFET designs. This next-generation custom design platform...
Cadence Design Systems has announced that its digital and signoff tools are now enabled for the current version of the Globalfoundries 22FDX platform reference flow. Globalfoundries...
Cadence Design Systems has announced the Cadence Memory Model for the LPDDR5 standard. This new verification IP (VIP) product enables engineers to verify that system-on-chip (SoC)...
Nano-electronics research center imec and Cadence Design Systems have announced that the companies completed the first tapeout of a 5nm test chip using extreme ultraviolet (EUV) as...
Cadence Design Systems has announced that its Allegro system-in-package (SiP) and physical verification system (PVS) implementation technologies have been enabled for TSMC's integrated...
Cadence Design Systems has announced an intellectual property (IP) portfolio for TSMC's 10nm FinFET (N10) process. Cadence has already secured multiple design wins with this portfolio...
Cadence Design Systems has announced that Realtek Semiconductor utilized the Cadence Palladium XP platform to accelerate the development and verification of a recent system-on-chip...
Cadence Design Systems has announced that it is collaborating with TSMC on the development of an Internet of Things (IoT) IP subsystem demonstration platform for TSMC's ultra-low...
Cadence Design Systems has announced that its implementation and signoff tools have achieved certification on the Intel 14nm process for customers of Intel Custom Foundry. Intel Custom...
In collaboration with design ecosystem partners, Globalfoundries has announced the availability of digital design flows for customers designing on its latest manufacturing technology...
Cadence Design Systems has announced that its digital and custom/analog tools have achieved certification from TSMC for its most-current version of 10nm FinFET Design Rule Manual...
Cadence Design Systems and Intel have delivered a 14nm library characterization reference flow for customers of Intel Custom Foundry, continuing their collaboration on enabling digital...