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Chipmakers gearing up for SiPh boom

Janet Kang, Taipei; Jessie Shen, DIGITIMES Asia 0

Credit: DIGITIMES

Advanced packaging for Silicon Photonics (SiPh) and Co-Packaged Optics (CPO) has emerged as an additional forward-thinking trend, following CoWoS, InFO, and SoIC.

The use of well-established IC substrate fundamental technologies or wafer-level integration is also associated with SiPh packaging. TSMC, ASE Technology, and other foundries and OSATs have the opportunity to engage in the supply chain for SiPh integration, according to industry sources.

The primary reason for the increased attention given to SiPh is the increasing prevalence of AI servers and data centers. It has emerged as a critical technology for addressing the energy and computational capacity challenges that AI systems and data centers face. It is anticipated that the SiPh industry will experience a significant increase in growth once the issues related to process technology and related components are resolved, sources said.

Simply put, SiPh uses photons instead of electrons to transmit signals on silicon wafers, uses optical waveguides to replace traditional copper wires as the channel for transmitting photons, and cooperates with CPO to integrate optical and electronic chips into the same package. This shortens the distance between components and reduces signal loss in photon transmission.

The SiPh industry output value was US$12.6 billion in 2022. This figure is expected to increase to US$78.6 billion by 2030, with a compound annual growth rate (CAGR) of 25.7%, according to market estimates.

Future AI applications will require substantially more computational power than they do now. Current AI processors are insufficient to fulfill future AI computing needs. SiPh will be important to expanding chip computing capacity, ASE Technology CEO Tien Wu was quoted as saying in previous reports.